Introduction

Silicon Power implemented dual secure design for power failure protection+.

All series of SP Industrial SSD with Power shielding firmware architecture protection when sensing unstable voltage and power down to stop receiving host commands. R series of SP Industrial SSD implements PFP+ with industrial grade polymer capacitors to gain more time for the data flushing process from DRAM cache to Flash, under sudden power off situations.

Key Features and Function

• New circuit design of DC power can boost up to 26V enhances high energy efficiency.
• Optimized HW-based PFP with Polymer tantalum capacitors and SW-based power shield.
• Operation temperature from -55 to 105℃ of Polymer capacitors.
• Hold-up time can last minimum 25ms and up to 100ms.

How SSD controller manages power failure

SSD FW stored inside NAND Flash called system block. When System power is on, SSD will load related mapping table and initial commands into DRAM for SSD controller. When VCC is under 4V, SSD Controller will enable the power shielding function, during this period the SSD controller will start to flush DRAM cache data save into FLASH to secure the user data in a limited time. At the same time VCC <4V SSD controller will stop receiving command from Host to protect itself. Hosts cannot recognize SSD and SSD stop working during this period until VCC resumes and become stable. When VCCF is under 2.7V, SSD controller will initially flush command to write back mapping table back to flash system block. During this period Host can’t recognize SSD. SSD still can’t work even with power resumes.

Need to turn Power ON/OFF again for host to restart SSD work normally. During SSD operation, data is temporarily stored in the DRAM cache to reduce the performance gap between the host interface and the NAND Flash memory.

However, in cases of unexpected sudden power loss, such as unplugging the power to the system, sudden battery loss or unplugging devices from the system, the flushing process cannot be completed and may cause serious device failure. Silicon Power Dual secure design for power failure protection+ (PFP+) resolves such issues with firmware-based protect mechanism and capacitor backup circuit.

How does the Power Failure Protection+ (PFP+) mechanism work?

Power Shielding function integrates built-in VDT and firmware mechanism. The trigger alert can monitor an abnormal power drop and take instant action, such as prohibiting receiving data from the Host and backup mapping/linking table into FLASH, as soon as potential power failure is detected. PFP+ is a way to gain more time for the data flushing process from DRAM cache or SLC cache to FLASH under sudden power-off situations by using dedicated polymer capacitor components. These capacitors are charged during power on and offer charged power to the SSD circuit under sudden power-off situations. 

SP’s PFP+ technology SSD provides at least 30ms to ensure the data flushing task can be completed within the discharge time. Furthermore, it always passes the Power Cycling test under abnormal conditions at least 3,000 times.